The parameters of all components made of semiconductor material are functions of the mechanical state of tension of the semiconductor material. This phenomenon is known under the name piezoelectric effect and is especially pronounced in resistors and Hall elements, for example. When such piezoelectric effect-sensitive components are used in precision instruments such as electricity meters, problems arise in precision and longterm stability that are not solved easily, in particular when the components are being incorporated into integrated circuits. This is because the installation of chips in a housing and/or on a mechanical support results in thermo-mechanical tensions which are difficult to control and thereby lead to undesirable piezoelectric effects. Because of this, important parameters of the components used can assume values which do not correspond to the calculated or desired values. Due to different thermal and/or mechanical tensions from chip to chip the parameter values can furthermore be subject to wide scattering and to great changes leading to problems of precision and longterm stability
It is known from the following documents and the following book:
Phys. stat. sol (a) 35, K115 to K118 (1976), "Effect of mechanical stress on the offset voltage of Hall devices in Si IC", Y. Kanda and M. Migitaka, PA0 Phys. Stat. Sol. (a) 38, K41 to K44 (1976), "Design Consideration for Hall devices in Si IC", Y. Kanda and M. Migitaka, PA0 RCA Review, Vol. 43, December 1982, pages 590 to 607, "Piezoresistivity Effects in Plastic-Encapsulated Integrated Circuits", K.M. Schleiser, S.A. Keneman and R.T. Mooney, and PA0 "Hybridintegration, Technologie und Entwurf von Dickschichtschaltungen", Huthig-Verlag, Heidelberg, 1986, pages 214 to 217, M. Feil, A. Kolbeck, P. Lenk, H. Reichl and E. Ziegler PA0 through an optimal selection of the crystal orientation (100), (110) or (111) of the wafer material, PA0 through optimal selection of the spacial direction of the critical components in relation to the crystal lattice of the wafer material used or PA0 through utilization of an appropriate installation of the chips, e.g. by means of so-called "flip-chip bonding".
that piezoelectric effects can be minimized
It is the object of the present invention to provide an arrangement which cancels out or at least significantly reduces the negative influences of piezoelectric effects which are due to installation, in particular their negative effect on the precision and the longterm stability of a electronic precision circuit made of semiconducting components. The arrangement according to the invention is therefore used for the mechanical isolation of the electric components which are sensitive to piezoelectric effects, and thus to free them to the greatest possible extent from thermo-mechanical tensions which are due to installation.